SALT ATMOSPHERE
Status: Reaffirmed September 2020Salt atmosphere is a destructive, accelerated stress that simulates the effects of severe seacoast atmosphere on all exposed surfaces. Such stressing and post-stress testing determine the resistance of solid-state devices to corrosion and may be performed on commercial and industrial product in molded or hermetic packages.
Committee(s): JC-14, JC-14.1
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STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS
This standard describes a baseline set of acceptance tests for use in qualifying electronic components as new products, a product family, or as products in a process which is being changed.
Committee(s): JC-14, JC-14.3
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POWER AND TEMPERATURE CYCLING
The power and temperature cycling test is performed to determine the ability of a device to withstand alternate exposures at high and low temperature extremes and simultaneously the operating biases are periodically applied and removed. It is intended to simulate worst case conditions encountered in application environments. The power and temperature cycling test is considered destructive and is only intended for device qualification. This test method applies to semiconductor devices that are subjected to temperature excursions and required to power on and off during all temperatures.
Committee(s): JC-14, JC-14.1
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TEMPERATURE, BIAS, AND OPERATING LIFE
This test is used to determine the effects of bias conditions and temperature on solid state devices over time. It simulates the devices’ operating condition in an accelerated way, and is primarily for device qualification and reliability monitoring. A form of high temperature bias life using a short duration, popularly known as burn-in, may be used to screen for infant mortality related failures. The detailed use and application of burn-in is outside the scope of this document.
Committee(s): JC-14, JC-14.1
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CHARACTERIZATION AND MONITORING OF THERMAL STRESS TEST OVEN TEMPERATURES
Status: Reaffirmed September 2019This document provides an industry standard method for characterization and monitoring thermal stress test oven temperatures. The procedures described in this document should be used to insure thermal stress test conditions are being achieved and maintained during various test procedures.
Committee(s): JC-14, JC-14.1
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Temperature Cycling
This standard applies to single-, dual- and triple-chamber temperature cycling in an air or other gaseous medium and covers component and solder interconnection testing.
Committee(s): JC-14.1
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THERMAL SHOCK
This test is conducted to determine the robustness of a device to sudden exposure to extreme changes in temperature and to the effect of alternate exposures to these extremes.
Committee(s): JC-14, JC-14.1
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ACCELERATED MOISTURE RESISTANCE - UNBIASED AUTOCLAVE
Status: Reaffirmed January 2021This test allows the user to evaluate the moisture resistance of nonhermetic packaged solid state devices. The Unbiased Autoclave Test is performed to evaluate the moisture resistance integrity of non-hermetic packaged solid state devices using moisture condensing or moisture saturated steam environments. It is a highly accelerated test that employs conditions of pressure, humidity and temperature under condensing conditions to accelerate moisture penetration through the external protective material (encapsulant or seal) or along the interface between the external protective material and the metallic conductors passing through it. This test is used to identify failure mechanisms internal to the package and is destructive.
Committee(s): JC-14.1
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HERMETICITY
Status: Reaffirmed September 2017Testing for hermeticity on commercial product is not normally done on standard molded devices that are not hermetic. Commercial product that this test method applies to has a construction that produces a hermetic package; examples of this are ceramic and metal packages. Most of these tests are controlled and updated in the military standards, the two standards that apply are MIL-STD-750 for discretes, & MIL-STD-883 for microcircuits. The test within these standards can be used for all package types. Within these standards the tests are similar; MIL-STD-750 Test Method 1071 Hermetic Seal is recommended for any commercial hermetic requirements. For MIL-STD-883 the applicable test method is 1014 Seal.
Committee(s): JC-14.1
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STEADY-STATE TEMPERATURE-HUMIDITY BIAS LIFE TEST
This standard establishes a defined method and conditions for performing a temperature-humidity life test with bias applied. The test is used to evaluate the reliability of nonhermetic packaged solid state devices in humid environments. It employs high temperature and humidity conditions to accelerate the penetration of moisture through external protective material or along interfaces between the external protective coating and conductors or other features that pass through it. This revision enhances the ability to perform this test on a device which cannot be biased to achieve very low power dissipation.
Committee(s): JC-14, JC-14.1
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HIGH TEMPERATURE STORAGE LIFE
The test is applicable for evaluation, screening, monitoring, and/or qualification of all solid state devices. The high temperature storage test is typically used to determine the effects of time and temperature, under storage conditions, for thermally activated failure mechanisms and time-to failure distributions of solid state electronic devices, including nonvolatile memory devices (data retention failure mechanisms). Thermally activated failure mechanisms are modeled using the Arrhenius Equation for acceleration. During the test, accelerated stress temperatures are used without electrical conditions applied. This test may be destructive, depending on time, temperature and packaging (if any).
Committee(s): JC-14.1
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CYCLED TEMPERATURE HUMIDITY-BIAS WITH SURFACE CONDENSATION LIFE TEST
The Cycled Temperature-humidity-bias Life Test is performed for the purpose of evaluating the reliability of nonhermetic packaged solid state devices in humid environments. It employs conditions of temperature cycling, humidity, and bias that accelerate the penetration of moisture through the external protective material (encapsulant or seal) or along the interface between the external protective material and the metallic conductors that pass through it. The Cycled Temperature-Humidity-Bias Life Test is typically performed on cavity packages (e.g., MQUADs, lidded ceramic pin grid arrays, etc.) as an alternative to JESD22-A101 or JESD22-A110.
Committee(s): JC-14, JC-14.1
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LEAD INTEGRITY
Status: Reaffirmed - May 2023This test method provides various tests for determining the integrity lead/package interface and the lead itself when the lead(s) are bent due to faulty board assembly followed by rework of the part for reassembly. For hermetic packages it is recommend that this test be followed by hermeticity tests in accordance with Test Method A109 to determine if there are any adverse effects from the stresses applied to the seals as well as to the leads. These tests, including each of its test conditions, is considered destructive and is only recommended for qualification testing. This test is applicable to all through-hole devices and surface-mount devices requiring lead forming by the user.
Committee(s): JC-14, JC-14.1
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FOUNDRY PROCESS QUALIFICATION GUIDELINES – PRODUCT LEVEL (Wafer Fabrication Manufacturing Sites)
This document describes package-level test and data methods for the qualification of semiconductor technologies. It does not give pass or fail values or recommend specific test equipment, test structures or test algorithms. Wherever possible, it references applicable JEDEC such as JESD47 or other widely accepted standards for requirements documentation.
Committee(s): JC-14.2
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ELECTRICAL PARAMETERS ASSESSMENT
Status: Reaffirmed May 2014, September 2020This standard is intended to describe various methods for obtaining electrical variate data on devices currently produced on the manufacturing and testing process to be qualified. The intent is to assess the device's capability to function within the specification parameters over time and the application environment (operating range of temperature, voltage, humidity, input/output levels, noise, power supply stability etc.).
Committee(s): JC-14.3
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MEASURING WHISKER GROWTH ON TIN AND TIN ALLOY SURFACE FINISHES
Status: Reaffirmed May 2014, September 2019The predominant terminal finishes on electronic components have been Sn-Pb alloys. As the industry moves toward Pb-free components and assembly processes, the predominant terminal finish materials will be pure Sn and alloys of Sn, including Sn-Bi and Sn-Ag Pure Sn and Sn-based alloy electrodeposits and solder-dipped finishes may grow tin whiskers, which could electrically short across component terminals or break off the component and degrade the performance of electrical or mechanical parts.
Committee(s): JC-14, JC-14.1
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